NEC TECHNOLOGIES, INC.

PowerMate Express 486/33e

Processor

80486DX

Processor Speed

33MHz

Chip Set

Intel

Max. Onboard DRAM

16MB

Cache

128KB (on CPU module)

BIOS

NEC (Flash EEPROM)

Dimensions

330mm x 218mm

I/O Options

Proprietary CPU module slot, keyboard/bus mouse interface, serial ports (2), parallel port, VGA port, proprietary video card sockets, proprietary external memory card slot, IDE interface, floppy drive interface

NPU Options

4167

CONNECTIONS

Purpose

Location

Purpose

Location

Proprietary CPU module

J6

Video port

P6

Proprietary external memory card

J7

Keyboard/Bus mouse interface

P7

Proprietary video card

J8, J9, & J10

Fan power

P8

IDE interface

P1

IDE interface LED

P9

Floppy drive interface

P2

External battery

P10

Parallel port

P3

Power supply

P11 & P12

Serial port (COM1)

P4

Drive power

P13

Serial port (COM2)

P5

Drive power

P14

USER CONFIGURABLE SETTINGS

Function

Jumper

Position

»

Password enabled

3F1

pins 2 & 3 closed

 

Password disabled

3F1

pins 1 & 2 closed

»

Test mode disabled

10A1

Open

 

Test mode enabled

10A1

Closed

»

I/O recovery disabled

11B5

Open

 

I/O recovery enabled

11B5

Closed

»

NEC VGA adapter disabled (U.S. setting)

15A1

Open

 

NEC VGA adapter enabled

15A1

Closed

»

Parallel port (P3) configuration LPT1/IRQ7, LPT2/IRQ5

15C3

1 & 2, 5 & 6

 

Parallel port (P3) configuration LPT1/IRQ5, LPT2/IRQ7

15C3

2 & 3, 4 & 5

»

Manufacturing loop disabled

15K1

Closed

 

Manufacturing loop enabled

15K1

Open

»

BIOS flash reprogramming disabled

17H1

pins 2 & 3 closed

 

BIOS flash reprogramming enabled

17H1

pins 1 & 2 closed

»

ROM type select 27C256 (28F256)

18F1

pins 1 & 2 closed

 

ROM type select 27C512 (28F512)

18F1

pins 2 & 3 closed

Note: Pins designated should be in the closed position.

DRAM CONFIGURATION

Size

Bank 0

Bank 1

4MB

(2) 256K x 36

(2) 256K x 36

8MB

(2) 1M x 36

NONE

16MB

(2) 1M x 36

(2) 1M x 36

CACHE CONFIGURATION

Notes:The CPU card comes standard with 128KB of cache and is not configurable.

The locations of the cache chips are unknown.